1,379 research outputs found

    Detection mechanism in highly sensitive ZnO nanowires network gas sensors

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    Metal-oxide nanowires are showing a great interest in the domain of gas sensing due to their large response even at a low temperature, enabling low-power gas sensors. However their response is still not fully understood, and mainly restricted to the linear response regime, which limits the design of appropriate sensors for specific applications. Here we analyse the non-linear response of a sensor based on ZnO nanowires network, both as a function of the device geometry and as a response to oxygen exposure. Using an appropriate model, we disentangle the contribution of the nanowire resistance and of the junctions between nanowires in the network. The applied model shows a very good consistency with the experimental data, allowing us to demonstrate that the response to oxygen at room temperature is dominated by the barrier potential at low bias voltage, and that the nanowire resistance starts to play a role at higher bias voltage. This analysis allows us to find the appropriate device geometry and working point in order to optimize the sensitivity. Such analysis is important for providing design rules, not only for sensing devices, but also for applications in electronics and opto-electronics using nanostructures networks with different materials and geometries

    Role of ICT Innovation in Perpetuating the Myth of Techno-Solutionism

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    Innovation in Information and Communication Technology has become one of the key economic drivers of our technology dependent world. In popular notion, the tech industry or how ICT is often known has become synonymous to all technologies that drive modernity. Digital technologies have become so pervasive that it is hard to imagine new technology developments that are not totally or partially influenced by ICT innovations. Furthermore, the pace of innovation in ICT sector over the last few decades has been unprecedented in human history. In this paper we argue that, not only ICT had a tremendous impact on the way we communicate and produce but this innovation paradigm has crucially shaped collective expectations and imagination about what technology more broadly can actually deliver. These expectations have often crystalised into a widespread acceptance, among general public and policy makers, of technosolutionism. This is a belief that technology not restricted to ICT alone can solve all problems humanity is facing from poverty and inequality to ecosystem loss and climate change. In this paper we show the many impacts of relentless ICT innovation. The spectacular advances in this sector, coupled with corporate power that benefits from them have facilitated the uptake by governments and industries of an uncritical narrative of techno-optimist that neglects the complexity of the wicked problems that affect the present and future of humanity

    SOI Technology: An Opportunity for RF Designers?, Journal of Telecommunications and Information Technology, 2009, nr 4

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    This last decade silicon-on-insulator (SOI) MOS-FET technology has demonstrated its potentialities for high frequency (reaching cutoff frequencies close to 500 GHz for n-MOSFETs) and for harsh environments (high temperature, radiation) commercial applications. For RF and system-onchip applications, SOI also presents the major advantage of providing high resistivity substrate capabilities, leading to substantially reduced substrate losses. Substrate resistivity values higher than 1 kΩ cm can easily be achieved and high resistivity silicon (HRS) is commonly foreseen as a promising substrate for radio frequency integrated circuits (RFIC) and mixed signal applications. In this paper, based on several experimental and simulation results the interest, limitations but also possible future improvements of the SOI MOS technology are presented

    Subcritical crack growth in freestanding silicon nitride and silicon dioxide thin films using residual stress-induced crack on-chip testing technique

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    Thin film materials are ubiquitous in a large number of applications like flexible electronics, microelectromechanical / nanoelectromechanical systems (MEMS/NEMS) and functional coatings. In the present work, a new mechanical testing method on a chip is developed to characterize the fracture behavior of freestanding thin films. This on-chip technique is based on the residual stress inside what is called here actuator material. Two beams are fabricated with the actuator film and attached to a specimen, incorporating a notch induced by lithography. The residual stress upon release by chemical etching leads to the actuator contraction, hence pulling on the central notched specimen. A crack is initiated at the notch tip, propagates and finally stops when the energy release rate has decreased down to its critical value. This crack arrest measurement avoids the problem of introducing a sufficiently sharp precrack. Besides, using a freestanding film leads to extract the real intrinsic fracture resistance of the film without any substrate effect. By tracking the crack length growth over different time intervals as well as environments using this crack on-chip testing method, the subcritical crack growth mechanisms can be investigated without monopolizing any test equipment. Thin film materials that are showing time-dependent failure are used in numerous devices that its reliability is determined by the understanding of the mechanisms causing the subcritical crack growth. Low-pressure chemical vapor deposition (LPCVD) silicon nitride (SiN) and silicon dioxide (SiO2) films deposited by electron beam-evaporation technique are studied with a variety of thicknesses. The specimens are tested in laboratory air and dry nitrogen environments under various temperature conditions. The stress intensity factor (K) and the crack velocity (v); K-v curve in different environments is determined based on both experimental data and finite element simulation results (FE), following classical exponential law

    Impact of crosstalk into high resistivity silicon substrate on the RF performance of SOI MOSFET

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    Crosstalk propagation through silicon substrate is a serious limiting factor on the performance of the RF devices and circuits. In this work, substrate crosstalk into high resistivity silicon substrate is experimentally analyzed and the impact on the RF behavior of silicon-on-insulator (SOI) MOS transistors is discussed. The injection of a 10 V peak-to-peak single tone noise signal at a frequency of 3 MHz ( fnoise) generates two sideband tones of *−56 dBm separated by fnoise from the RF output signal of a partially depleted SOI MOSFET at 1 GHz and 4.1 dBm. The efficiency of the introduction of a trap-rich polysilicon layer located underneath the buried oxide (BOX) of the high resistivity (HR) SOI wafer in the reduction of the sideband noise tones is demonstrated. An equivalent circuit to model and analyze the generation of these sideband noise tones is proposed

    On-wafer wideband characterization: a powerful tool for improving the IC technologies, Journal of Telecommunications and Information Technology, 2007, nr 2

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    In the present paper, the interest of wideband characterization for the development of integrated technologies is highlighted through several advanced devices, such as 120 nm partially depleted (PD) silicon-on-insulator (SOI) MOSFETs, 120 nm dynamic threshold (DT) voltage – SOI MOSFETs, 50 nm FinFETs as well as long-channel planar double gate (DG) MOSFETs

    A Broadband CPW-to-Microstrip Modes Coupling Technique

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    A broadband vertical transition from coplanar waveguide (CPW)-to-microstrip modes is presented. The transition has a double resonance and can be tuned for very wide-band operation. The CPW-to-microstrip modes coupling technique is useful for the vertical integration of multi-layer millimeter-wave circuits, packaging and antenna feeding networks. A vertical transition has been fabricated on 100 μm silicon substrate for operation at W-band frequencies and shows less than 0.3 dB of insertion loss and better than 12 dB of return loss from 75 to 110 GHz. A 94 GHz CPW-fed microstrip antenna showing a 10-dB bandwidth of about 30 % has been built using the same transition technique.Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/44555/1/10762_2004_Article_453163.pd
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